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VHDL for designers / Stefan Sjoholm and Lennart Lindh.

By: Sjoholm, StefanContributor(s): Lindh, LennartMaterial type: TextTextPublication details: Hemel Hempstead : Prentice Hall, 1997. ISBN: 0134734149Subject(s): VHDL (Computer hardware description language) | Digital integrated circuits -- Design and construction -- Data processingDDC classification: 621.392
Contents:
1. Introduction and overview -- 2. Introduction to VHDL -- 3. Concurrent VHDL -- 4. Sequential VHDL -- 5. Library, package and subprograms -- 6. Structural VHDL -- 7. RAM and ROM -- 8. Testbench -- 9. State machines -- 10. RTL synthesis -- 11. Design methodology -- 12. Test methodology -- 13. Rapid prototyping -- 14. Common design errors in VHDL and how to avoid them -- 15. Design examples and design tips -- 16. Development tools -- 17. Behavioural synthesis -- 18. Laboratories -- 19. Answers -- App. A. VHDL syntax -- App. B. VHDL-package -- App. C. Keywords in VHDL-87 -- App. D. Additional keywords in VHDL-93.
Holdings
Item type Home library Call number Status Date due Barcode Item holds
Two Week Loan Two Week Loan College Lane Learning Resources Centre
Main Shelves 		621.392 SJO (Browse shelf(Opens below)) Available 4403737857
Two Week Loan Two Week Loan College Lane Learning Resources Centre
Main Shelves 		621.392 SJO (Browse shelf(Opens below)) Available 4403737839
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Enhanced descriptions from Syndetics:

1. Introduction and overview -- 2. Introduction to VHDL -- 3. Concurrent VHDL -- 4. Sequential VHDL -- 5. Library, package and subprograms -- 6. Structural VHDL -- 7. RAM and ROM -- 8. Testbench -- 9. State machines -- 10. RTL synthesis -- 11. Design methodology -- 12. Test methodology -- 13. Rapid prototyping -- 14. Common design errors in VHDL and how to avoid them -- 15. Design examples and design tips -- 16. Development tools -- 17. Behavioural synthesis -- 18. Laboratories -- 19. Answers -- App. A. VHDL syntax -- App. B. VHDL-package -- App. C. Keywords in VHDL-87 -- App. D. Additional keywords in VHDL-93.

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